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RE: #ifdef #else #endif inside module instantiation in Verilog
As ever though, this highlights why it's better to submit a runnable testcase rather than a broken code fragment that has multiple errors in it!
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RE: Warning envSetval: Can't set the value of variable 'pathPurposeList', in...
Really need to see the specific (and complete) message - you've just given a bit of the message (the tool mentioned in the warning). However, from that, I've seen that this was a layoutXL cdsenv...
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RE: How to know the cut class of via which is already created
Hi Sathish, The cut class is not recorded in the viaHeader - the edit properties form tries to infer the cut class from whatever the cutWidth/cutHeight are (at least I think that's what it's doing from...
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RE: Assura LVS Parameter Mismatch Error
Maybe you could play with the auLvs simulation information in the CDF for the component in question to get it to netlist the right parameters, but that still assumes the LVS rules will be taking those...
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RE: Maintain "Persistence" of Find after done command is completed while...
Paul, I'm amazed at all the comments for your issue. So, I will make this simple for you. Just assign a key to point to this script as shown here. You can edit it per your needs. So, when you want your...
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RE: Need help in writing Skill for routing between two different MOS
Raghu, The purpose of that code was just to help me understand what the structure of the pins on your device was. Trying to add instance-specific information into the code is going to just be confusing...
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RE: geHiDragFig interrupt issues
There are a couple things you can do to minimize your issues, although maybe not eliminate them. First, your own code can avoid nesting by checking the hiGetCurrentCmd or using hiIsFormDisplayed if...
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RE: Accessing Packed Arrays using Tcl Interface
Tim, Thank you for the response. I understand the first solution, but it is something not readily implementable in my current setup. The second solution doesn't work always because I might want to...
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RE: How to know the cut class of via which is already created
I was kinda working on something similar to you. Its kinda a work in progress of how to get a via cutClass You can read more about cutClass from the cdshelp search "accessing cutClass" If you need all...
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RE: Function to create or edit mouse popup gui
Virtuoso ( similar to _lxHiMousePopUp() adding new callbacks) I thought there was a file or function to edit the current middle mouse button popup or a function to create a popup gui similar to the...
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RE: geHiDragFig interrupt issues
Thank you, Derek. I found the commands you gave have worked well in reducing much of the quirkiness I was experiencing with the unintentional nesting of the geHiDragFig function. Adam
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RE: #ifdef #else #endif inside module instantiation in Verilog
Hi Stephen, I totally understand. It is my mistake :( I will make sure I will post a bug free/no syntax error codes in future. The code is based on open source License, so I wasn't sure whether I can...
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Spectre suddenly stops running during Parametric Analysis (ADE L)
Hopefully somebody can answer this question but, we are having trouble trying to get a Parametric Analysis to COMPLETE when running ADE simulation. Every time we run it, spectre seems to stop running...
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RE: #ifdef #else #endif inside module instantiation in Verilog
Hi Tom, Changing the " # " to " ` " does solve that missing parenthesis error. Thank you!
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RE: Efficiency of associative array
Thank you for your kind suggestion and sorry for my haste. I will recall my post for the comparative data. Yes, you're right. The profiling shows I've called so much uvm_top.find() in my testbench,...
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RE: Multi-trace routing
I've never heard of something called "Multi Line Route" but all license levels support multiple net routing. Just select the nets in the route->connect menu (I just draw a box thru the...
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RE: Same net line to shape errors.
Jim Sounds like the shape did the trick. It is still unusual that the cline is giving you a DRC error. It is plausible that your plane is not complete, What I mean is that it is not completely tied to...
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RE: Maintain "Persistence" of Find after done command is completed while...
Hi Pat, another excellent document and "scriptmode +e" is just a charm, very helpful. I was working on a board last night checking the nets. One little macro saved the day. funckey n "prepopup ; pop...
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RE: Restrict innovus tool in placing VIABAR
Hi Kari Thanks for your reply. I am not sure exactly in what situation it is called VIABAR. Anyways, after finishing the PnR flow in Innovus, I import the the .gdsII and netlist file to virtuoso for...
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