Is there a way to set the `default_nettype directive through the command-line...
For instance, something like: irun top.v -f manifest.f +define+FPGA=1 +default_nettype=none As opposed to putting: `default_nettype none Within the files themselves. Either a direct way or a workaround...
View ArticleRE: Verilog A ADC design
Well, the first problem is that with an input signal of 4GHz and a clock frequency of 800MHz, your signal is undersampled (i.e. above Nyquist) and so you'd expect a DC output since the input signal is...
View ArticleRE: Verilog A ADC design
Thanks Andrew for your descriptive reply. To be very specific I am using this ADC in the front end for data acquisition in Compressive sampling. For my final year thesis ( I am an undergrad student in...
View ArticleADE Explorer Real time tuning with schematic DC annotations
When you run a DC analysis you can annotate the voltages and currents on the schematic. Is there any way to use this with ADE Explorer's real time tuning? ADE Explorer won't let the mode run without an...
View ArticleRE: Verilog A ADC design
Given that I'm not realistically going to study a 60-odd page thesis to answer a question on the forums (you have to do something for your degree!) I merely quickly scanned it. The system is a...
View ArticleRE: ADE Explorer Real time tuning with schematic DC annotations
Matthew, Which subversion are you using? You're right that an output is needed (I just added an output expression of VDC("/out") for example and that was sufficient). I can then go into Real Time...
View ArticleRE: Spectre simulation of verilogA file
Hi Andrew, Thanks for the quick reply. I tried a few things to try resolve the issue without success. I cleared most of the disk space (pretty much with just my verilogA, schematic, spectre files...
View ArticleRE: get via coloring
Paul, Should be sth similar to this code: layer1Num = via_Id->viaHeader->viaDef->layer1Num layer2Num = via_Id->viaHeader->viaDef->layer2Num cv_id = dbOpenCellViewByType( "wo_kourany"...
View ArticleRE: SKILL for changing via.
Regarding to your 1) and 2) point below code works for changing via without deleting the vias, as you told. procedure(viachange2() cvId= geGetEditCellView() vias = geGetSelSet() leReplace(cvId vias...
View ArticleRE: SKILL for changing via.
This does delete the via and add it again. It's just using a higher level layout editor function (rather than a db function) to do it. Unfortunately all it does is preserve all the other attributes on...
View ArticleRE: Spectre simulation of verilogA file
Changing the umask to 0 is unlikely to help as that only adds "other" write permission; you should already have write permission for you as the user (and your group, given that your umask was 002...
View ArticleRE: Liberate_AMS for .lib generation.
Liberate has this variable, spectre_use_char_opt_license, which is a common setting for all Liberate tools. By default it is "1", ie. "on". You can use set_var spectre_use_char_opt_license 0 to turn...
View ArticleRE: Spectre simulation of verilogA file
It worked! I could not help smiling when it compiled. I set it to 64 bit in my ADE and it worked. So I guess that 32-bit spectre was the issue. Thanks a lot Andrew! Krishnaa
View ArticleIn Other News, 100 People Were Killed by Cars Driven by People
You probably heard that last week, a woman was killed in Phoenix by a driverless car. In 2016, 37,461 people were killed on US roads. So if that day was typical (and it probably varies by weekday...
View ArticleRE: Save and Recreate TrackPattern
Hi Markus, Unfortunately SKILL support for the Advanced Node features of Track Patterns is a bit lacking (there are a handful of functions, but nothing that returns the width). In general we'd say that...
View ArticleRE: Liberate_AMS for .lib generation.
Thanks Guangjun....Could you let me know what is the functionality of this feature ?
View ArticleRE: Liberate_AMS for .lib generation.
Hi Anand, Below is what's said in the Liberate manual, --------- This parameter enables Liberate to checkout Spectre_char_opt licenses upfront instead of MMSIM licenses, which are only checked out by...
View ArticleRE: ADE Explorer Real time tuning with schematic DC annotations
Hi Andrew, The instructions in your first paragraph got it working. I think it was as you said: I hadn't explicitly run an initial simulation and was just moving the slider about for no reason. Many...
View ArticleMonte Carlo data extraction
Hello, I am a Greek student doing my Phd on SRAM sense amplifiers. I am using the Virtuoso 1.5 version and I want to do some Monte Carlo runs. I wanted to ask if there is a way to extract from the runs...
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