Well, the first problem is that with an input signal of 4GHz and a clock frequency of 800MHz, your signal is undersampled (i.e. above Nyquist) and so you'd expect a DC output since the input signal is an exact multiple of the clock - each sample will end up at the same phase point in the sine wave. The graph image shows what looks more like a ramp rather than a sine wave - and that ramp is effectively half of a 10MHz triangle wave. However, I suspect if it's producing all zeros, you've not set the threshold for the clock properly. You didn't say what signal levels you've used or what parameters you set on the ADC. In order to make it easier to see, I just did this from a spectre netlist, but here's what I used to test it (the code above is in forum42.va): // parameters FREQ=40M CYCLES=1 Vclk (clk 0) vsource type=pulse val0=0 val1=1.8 period=1.25n rise=1p fall=1p width=1.25n/2 Vsin (sin 0) vsource type=sine freq=FREQ ampl=0.25 dc=0.5 Iadc (sin clk d9 d8 d7 d6 d5 d4 d3 d2 d1 d0) adc_8bit vth=0.9 ahdl_include "forum42.va" tran tran stop=1/FREQ*CYCLES The simulation was just run with "spectre forum42.scs" and then the results looked at in "viva". I could then easily change the FREQ - here it's 40MHz, but if you change it to 4G you'll see a flat output signal. The bus at the bottom was produced with ViVA's Measurement->Analog to Digital and then the resulting bus was converted back into analog using Measurement->Analog to Digital and is overlayed over the input sine wave: If you had a pulse source for the clock but the input threshold (vth on the ADC) was left at default, it's probably just not switching (I get all zeros), but even if I use a 4GHz sine wave and have a sensible vth I just get a (as expected) constant output from the ADC (not all zeros, but constant nevertheless). If you don't understand about Nyquist, then I suggest you speak to your supervisor/tutor (I'm assuming you're a University student). Regards, Andrew.![]()
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