Clik here to view.
GlobalFoundries Executive Team Explains the Pivot
At the recent GlobalFoundries Technology Conference GTC there was a press and analyst lunch. Tom Caulfield (CEO), Gary Patton (CTO), and Bami Bastani (SVP of the business units) answered questions, Tom...
View ArticleClik here to view.
How to read current flow into a schematic symbol terminal using SKILL?
Hello SKILL experts, I am fairly new to SKILL and have a basic doubt. I have searched for a solution in the Community Technical Forums for hours but was unable to get any help. The problem is as...
View ArticleClik here to view.
RE: Cadence Liberate Characterization Help
Hi Anuradha, Thank you for your reply and I am sorry for my late response. I have tried with the sample run script, model file, and template provided with the Liberate tool and got the library creation...
View ArticleClik here to view.
compare pins from 2 symbol
How to compare pins from 2 different symbols in virtuoso using skill code ?
View ArticleClik here to view.
RE: Unable to edit a cellview in a RAK
Ok I just checked the env variable is set to /tmpdir What should the $TMPDIR env variable be set to? Or should I not use the variable at all? edit: The $TMPDIR env variable was set to /tmp and that...
View ArticleClik here to view.
Footprint Preview
Hi everyone, I'm a newbie. It's the first time I use PCB Allegro. I can't see the preview of any components, even Resistor or Capacitor. And I don't know how to add library. Please supporting me. Thank...
View ArticleClik here to view.
axlUnsetVariableFile not update user env for allegro_html and allegro_html_qt
Hi all, I tried to use axlUnsetVariableFile to turn off allegro_html_qt, but it does not update the user env file. I also tried the same for allegro_html and get the same results. Other variable seem...
View ArticleClik here to view.
RE: axlUnsetVariableFile not update user env for allegro_html and...
This is in 17.2 FYI
View ArticleClik here to view.
I'm a Doctor, Not an Engineer!
…to which Montgomery Scott immediately replied, “Now, you’re an engineer.” —Star Trek Original series, season 2, episode 4: Mirror, Mirror , October 6, 1967 The original Star Trek was trailblazing in...
View ArticleClik here to view.
RE: axlUnsetVariableFile not update user env for allegro_html and...
I just noticed, allegro_html works, but allegro_html_qt does not.
View ArticleClik here to view.
RE: Need Thumbnail warnings explanation
Hi Andrew, Thank you for your idea, I haven't thought about this possibility. DesignSync is available in my system but should be disabled for this project. Maybe there are some leftover setups that...
View ArticleClik here to view.
access signals through hierarchy in schematic
hello experts, this is just for testing bench purpose, how can I use signals across hirarchy w/o I/O ports, e.g., I want to see BlockA/BlockSub/signalB somewhere else? thanks, David
View ArticleClik here to view.
IC617 output table
Hi Team, I am using IC 617 for transient simulation. After the simulation, I can plot the output waveform. However, my desired form of output would be in a table format.Moreover, for instance, I want...
View ArticleClik here to view.
RE: IC617 output table
Hi Allen, Do Right Mouse->Send to Calculator, and then use the sample function in the calculator to sample the signal between a start and stop time and give the step size you want. Then in the...
View ArticleClik here to view.
RE: access signals through hierarchy in schematic
Hi David, I'm assuming you mean that you want to connect something to those internal signals? Otherwise if it's just observing them then you can do that anyway just by selecting those signals to plot....
View ArticleClik here to view.
Want to add Noise in VPWL source along with ECG signal
Hello I have extracted an ECG signal I have made a .txt file with one column of amplitude and other column of time. I want to now add noise of 500 Hz in Vpwlf source. I am able to place this .txt file...
View ArticleClik here to view.
RE: Cadence Liberate Characterization Help
Hi Hossain, Did your characterisation run finish successfully? please check the logfile for any warning or errors. do you see INVX1 in the 'List of failing cells' at the end of your logfile? For...
View ArticleClik here to view.
EDPS: Experience Teaching Undergraduates EDA
At the recent EDPS, Cadence's Patrick Groeneveld presented about a course that he and other EDA luminaries taught at Stanford last year. I say "Cadence's Patrick" since he currently works here, but he...
View ArticleClik here to view.
RE: How to change background color of schematic editor in cadence virtuoso
This does not work with the version 6.17 we have, however we do have the button shown in the screen grab above, but all it does is the background colour and actually there are a whole slew of things...
View ArticleClik here to view.
RE: access signals through hierarchy in schematic
Hello Andrew, Exactly and working. thanks a lot, David
View Article