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axlDBGetDesign()->pins returns nil?
Hi all, I tried to collect all the pins in a design by using axlDBGetDesign()->pins, but it returns nil. Am I missing something? Thanks, Jerry
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RE: skill code to automatically connect power pins in schematic
Glad to see my original suggestion in your other post worked for you ;-) You can register terminals interactively by hitting the "..." button next to the line with "registered terminals only" on the...
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RE: skill code to automatically connect power pins in schematic
Hi Andrew, thanks a lot for you suggestion. Let me try them now and I might have more questions :-) thanks again Nhumai
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RE: axlDBGetDesign()->pins returns nil?
A pin is not a child of a board design. You need to use a selection set to get the pins.
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RE: axlDBGetDesign()->pins returns nil?
Thanks Dave Do you know why pins are listed when you do axlDBGetDesign()->? Just curious. Jerry
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RE: skill code to automatically connect power pins in schematic
Hi Andrew, can I control the direction of the stubs ? if I can please tell me how. I need all of register stubs to be in horizontal thanks a lot Nhumai
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RE: skill code to automatically connect power pins in schematic
[quote userid="396529" url="~/cadence_technology_forums/f/custom-ic-skill/40135/skill-code-to-automatically-connect-power-pins-in-schematic/1356799#1356799"]can I control the direction of the...
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RE: axlDBGetDesign()->pins returns nil?
You can also use this to extract all pins and vias: lpins = lvias = nil axlExtractMap( "cpad_bv" lambda( (dbid cpad) case(dbid->objType ("pin" push(dbid lpins)) ("via" push(dbid lvias)))))
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ADEXL: automaticaly include extracted view
Hi all. I'm using ADEXL with spectre simulation with Extracted view Created by QRC. Simulation work well, but I have a problem that it consumes much file size. One of the reason is input.scs, it...
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RE: ADEXL: automaticaly include extracted view
Hi Kawai, You can use: envSetVal("adexl.simulation" "ignoreDesignChangesDuringRun" 'boolean t) in your .cdsinit (note, the CIW would be insufficient) or: adexl.simulation ignoreDesignChangesDuringRun...
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RE: Impedance calculation in inner layers
Just one word of caution: The impedance calculation is based on the adjacent layers being defined as "Planes" but the calculation assumes that there actually IS copper there. An empty layer will not...
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PCAST: The President's Council of Advisors on Science and Technology
In January 2017, a report Ensuring Long-Term U.S.Leadership in Semiconductors was delivered to the President. It was not yet the 20th of the month, so that was still President Obama. I read the report...
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Endcap and Decap Usage in P&R
Hi All, I want to perform place and route based on UMC 65nm node. However in the design kit, I cannot find above "physical only" cells and instead there are only filler cells (with/without n/p...
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Equivalent function for hiDisplayFileDialog in IC5
Hi, In Cadence IC6, the function "hiDisplayFileDialog" is available. However, in Cadence IC5, there are no such function. May i know what is the equivalent command for this function? or is there any...
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RE: Equivalent function for hiDisplayFileDialog in IC5
You can use ddsFileBrowseCB() to start a file browser linked to a field in a form - this works in both IC5141 and IC61X - in IC61 it uses the newer hiDisplayFileDialog underneath, but in IC5141 it uses...
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Renaming caused problems with pin pair definitions
After renumbering and backannotating the ref des on a design, DRC's appeared on BUSS signal lengths since the U* are no longer the same and a few of (but not all) the pin pairs were different since...
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Voltus: how to generate the "DFII Layer Map File"?
Hi! I'm trying to get Voltus-Fi working in my setup (16FF), but I am stuck with the "DFII Layermap" entry in the Voltus IR/EM dialog (see below). Is there any way to autogenerate this file from other...
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RE: Voltus: how to generate the "DFII Layer Map File"?
UPDATE: I tried using the file below as my DFII layermap (I obtained the layer names by grepping the keywords "conductor" and "via" from an .ict file form my PDK's QRC package): metal AP AP via RV RV...
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