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Come Join Us for "Deep Dive into the UVM Register Layer" - A Webinar From Duolos
Join us on September 14th for a free one-hour webinar on the finer aspects of the UVM register layer. We’ll be focusing on key aspects of the UVM Register Layer that can help you with your UVM modeling...
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RE: PicknPlace File generated from Orcad Layout is not in correct format
I just checked. Many of the component footprints are not centered on the origin. However, the layout design is already done. Is there any way to alter the pick n place file such that it's (X,Y)...
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What's For Breakfast? Video Preview September 17th to 21st 2018
https://youtu.be/3drxzhMFGD8 Coming from PCB West (camera Sean) Monday: HOT CHIPS: Some HOT Deep Learning Processors Tuesday: Intel Cascade Lake Wednesday: Embargoed Announcement from Tegensee...
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RE: PicknPlace File generated from Orcad Layout is not in correct format
Hello. There are a couple of methods to do this. If you do a standard "Placed Components Report" then the report will generate based on the creation origin of your symbol. This may not be desirable. To...
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How do I exclude my CPU netlist from probe?
Hi all, I use the following statement to probe all the hierarchy in my testbench. However I wish to exclude the CPU netlist model in tb.design.hier2.CPU_netlist. How do I do that? "database -open...
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RE: Voltus: how to generate the "DFII Layer Map File"?
Hi, I'm afraid there is no way to generate this file automatically. Also, at 16nm, the recommended flow is to use Voltus-Fi-XL so you can take into account the self-heating of devices. SHE flow is not...
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RE: Renaming caused problems with pin pair definitions
Check the version you are running from Help - About. It should be 17.2-2016 S047. If it says P028 or another S number then get the latest version from http://support.cadence.com or Download Manager and...
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RE: Voltus: how to generate the "DFII Layer Map File"?
Hi Saloni, thanks for your reply! Yes, I am enabling emirformat=vavo in my transient simulation results, and when I press "Input Type" in Voltus-Fi-L I can see it does automatically recognizes and...
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RE: Voltus: how to generate the "DFII Layer Map File"?
Hi Jorge, Did you also point to QRC run data (next to DFII layer map)? I cannot tell much without looking at the setup more closely.. If you think your setup matches the RAK, then it's best to contact...
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RE: How do I exclude my CPU netlist from probe?
The -exclude option provides a convenient way to exclude certain objects or scopes when creating a probe. The argument to the -exclude option is either an object name or a scope name. You can use...
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Spectre/Meltdown & What It Means for Future Design 3
I gave an introduction to speculative execution and the vulnerabilities that have come to light this year in my post Spectre/Meltdown & What It Means for Future Design 1 . Yesterday, I covered the...
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RE: Voltus: how to generate the "DFII Layer Map File"?
Yes, I'm pointing to my QRC extraction data directory. I'm not sure if I'll be able to open a support request (our access to 16FF is heavily NDA-restricted), but I'll check with my management. One last...
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Developing an Idea
Hi, Im new here and this is my first post. My question is if I have an idea of a product, will Cadence help in design process & development of the product, considering that I haven't used the...
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RE: Voltus: how to generate the "DFII Layer Map File"?
(a) DFII layer names are the layers you see in the layer palette in Virtuoso Layout Editor. If you want to get them in a file, you can dump the technology library into a text file and find the layers....
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Virtuoso: 新序曲- Cadence Virtuoso “第18.1 交响乐” 的前奏曲
当焕然一新的交响曲拉开帷幕时，优美动听的四乐章也随之上演： 层次化原理图驱动： 结合了自上而下与自下而上设计方法的优势，避免单独使用任意一种设计方法时而引起的缺陷； 层次可视化： 用户可在其设计阶段随时随地根据需求轻松地查看或隐藏设计细节，便于仅查看其所需的内容 层次及拥塞意识的布局及摆放： 提供自动化和辅助生产力 层次化布线和拥塞分析： 提前提供真实的路布线及拥塞分析信息...
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RE: Equivalent function for hiDisplayFileDialog in IC5
Thanks Andrew, the command "ddsFileBrowseCB()" is worked perfectly for me. I have other question regarding the command that not available in IC5 which is pcreCompile and pcreReplace. These two command...
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RE: Equivalent function for hiDisplayFileDialog in IC5
Hi KS, The only alternatives are the rexCompile and rexReplace functions. These support a rather more limited regular expression syntax. Andrew.
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RE: Equivalent function for hiDisplayFileDialog in IC5
Hi KS, The closest thing to the pcre* functions in IC5x are the rex* functions such as rexMatchp(), rexCompile(), rexReplace() etc. - these are not as powerful as the pcre* functions, they do not...
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RE: Track terminals name connected to a path using SKILL
Hi Farhan, Did you try looking at the "route" object? This should contain all of the pathSegs in a connection from one point to another. Best regards, Lawrence.
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RE: Adding Waveform function to Maestro
Hi Andrew, Thanks for your reply, you are right, I missed the "sample" argument because I simplified my original function in order to isolate the issue but sure "sample" is not an issue. I already...
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