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RE: How to collapse and expand the group in simvision with tcl command?
Hi, You can use the "waveform hierarchy collapse " command to collapse a group, where is the waveform trace id returned from the "waveform add -groups" command. For an example of how the commands...
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RE: Orcad Capture - Slow Graphics response on windows 10
I've been seeing this too. I thought it was just my computer until I saw the same thing happing on a co-workers computer. CM in allegro has bouts of this also, just not as slow as Orcad.
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RE: How to collapse and expand the group in simvision with tcl command?
Thank you Doug. It works now!
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Power Up Analysis
I'm running SPICE simulation on a block(CDL netlist from ASIC flow as input file). Ramp the power and measure total area of current spike. From total area of current spike I can get how much decap I...
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RE: Fail to run with user defined the "connect rules"
Hi Andrew Happy new year. Thank you for your quick reply. The reason that 616 is used, simply because the project environment is setup by another guy. I am pushing him to move to the latest version of...
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RE: Fail to run with user defined the "connect rules"
Hi Andrew I have tried it in 617, still the same issue. But with 617, I can use IE card, and by clicking the link of the connect module in the CR file, such warning message pops up in the CIW...
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RE: Fail to run with user defined the "connect rules"
Hi Yi, Without working through this again, and comparing with what you've done, I'm not sure I can offer much advice. I've done this before and don't recall there being such an issue, but I'd have to...
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Test Point Covered With Solder Mask
i recently processed a third party design, the "min pad size" for test points was set at 0.034", unfortunately there were vias selected as test points that met this rule but the solder mask opening was...
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Use via variant with auto via or via stack?
On the technology I am using the default via width for the top metal is not DRC clean for our application. I figured I could make a via variant to solve this. The issue is that once a variant is made,...
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RE: Trace snap to pads
When all else fails try: Tools -> Derive Connectivity -> Check off Convert Lines to Connected Lines -> OK Hope this helps.
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RE: Test Point Covered With Solder Mask
Yes but you'll need 17.2 QIR4 where Cadence introduced a new Constraint Manager Worksheet called Manufacturing. Part of this is some Annular Ring checks that include pad to mask checks. That should...
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SKILL to walk library looking for dependency
Had an issue where a reference cell in a design was created with dependency on another library that was not in the path. Would like to create a check to search all the cell views for and dependency....
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RE: SKILL to walk library looking for dependency
Paul, See the code in this post or this older post . Note, I just updated the abNewLibraryRefs code in both because I realised there was a buglet which meant they wouldn't have worked in OA-enabled...
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RE: Test Point Covered With Solder Mask
steve, thanks, i'll have to look for some type of report then, not sure when we migrate to 17.2
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Problem to convert file max
Hi all, I have a problem with board and i have a little time. I need to convert a file MAX (PCB layout) to file .brd (PCB Editor 17.2) and It's ok. After the conversion iI used dbdoctor. In output It...
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What's For Breakfast? Video Preview January 8th to 12th 2018
https://youtu.be/txCnT3N4OSY Coming from Executive Briefing Center (camera Sean) Monday: 2017—A Year in Breakfasts Tuesday: Virtuoso System Design Platform is Product of the Year Wednesday: Post...
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RE: how can add flying probe in allegro16.2 pcb
Well, if I could insert a snippet of the Testprep dialog I could show you, but I don't see a way to do that. I shall open that as a separate discussion. so in general you want to enable bare board -...
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RE: how can add flying probe in allegro16.2 pcb
The remaining parameters are pretty straight forward. Since it might be trial and error initially you'll probably want to use the Overwrite for the Execute Mode. This flushes the previously tagged...
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