Theoretically you could define a new CDF parameter in user CDF so that it was only defined in memory (the actual values would get stored on the instances, so they would show up again in the next session when you re-defined the user CDF), and then annotate that. However, this is very clunky and rather sensitive to doing things like File->Refresh where you could unwittingly discard all the user CDF. Personally I probably wouldn't create a flow that depended on doing it this way. There's no other workaround that I can think of though if you really wanted to do this. Regards, Andrew.![]()
↧
RE: displaying custom text in a schematic info balloon when hovering over an instance
↧
RE: Measure power of opamp circuit
This is a bit of a strange question. A Verilog-A model won't model the power consumption of the circuit that it is aiming to model unless you've consciously modelled it. Even then, it's got to represent the current consumption of the actual implementation of the circuit - there's no way an arbitrary model can reasonably model the current consumption (and hence power) of an opamp. For example, in this model, there's no current flow from the supply pins that is modelled. So if you were to take the simple approach of measuring the current into the supply and multiplying that by the supply voltage, you'd get a power of 0. There is also a mechanism in VerilogA where you can use the $pwr(powerValue) system task to output the power used by that model - although that hasn't been used in this model. You could take a copy and add a call to $pwr to do that. The current consumption will depend upon the implementation, as I mentioned. It would depend on the quiescent current in the amplifier, which would be mostly due to the current mirrors in the design (of course there may be other places current is drawn) - and that will depend upon how much current each of these is drawing. You'd have to model that in some way (maybe as simply as using $pwr) so that the model can then be used in a testbench where you're measuring power. Regards, Andrew.![]()
↧
↧
RE: is there skill code to link a layout to a schematic in VXL
Hi Max, Yes currently since we didn't generate layout from schematic so the VXL is not working for this lib. Even thought those cells lvs is clean still we can't use VXL to place them on the upper level. That is why I interested to learn if there is a way to make them work with VXL . thanks Nhumai![]()
↧
RE: is there skill code to link a layout to a schematic in VXL
Hi Quek, Thanks for your reply I didn't test your code yet let me do it tomorrow and I will update you Nhumai![]()
↧
RE: 17.2 Padstack Editor -- Opening scripts for 16.6 in 17.2?
Hi - OK This does run as part of the bat file but I have also run the script internally and the _brd script just creates more footprint files. It doesn't place any parts. The updated board (included this time) is empty). You might need to go back to UltraLibrarian who wrote this to find out if something is missing. community.cadence.com/.../data1.zip![]()
↧
↧
RE: getting class and subclass from ministatus
Hi Dave Just for the record, axlGetActiveLayer and axlSetActiveLayer are set to obsolete but probably still works. They are replaced with axlDBControl and works fine with class/subclass in ministatus. /Ole![]()
↧
How to change or set connection information for a MOS in layout XL?
Hi All, As we all know, we can create a dummy MOS in layout XL by right-mouse-button -> create dummy (select a Net name), and the skill command is leHiMakeDummy. Through this way, the dummy MOS will have connection info, we can see the term name in MOS”s gate/source/drain. Is there a similar command to do the same things but no need any interactive operation? Because I want to create some dummy mos in a skill procedure, and need the term name of the dummy MOS. Or is there any way to change or specify the term name for a MOS? Regards, Dave![]()
↧
RE: How to change or set connection information for a MOS in layout XL?
Hi Dave, There's no function called leHiMakeDummy - in fact there's no public function to create the dummies in this way (either with the UI or without). However, there are public functions to do so as part of a modgen - do a search in cdsFinder for "Dummy" to see the functions. You should contact customer support if you need this enhancement. Regards, Andrew.![]()
↧
Off Topic: Are You Smarter Than Google?
It's the day before Cadence is shut down for the holidays. Breakfast Bytes will resume normal service on January 2nd. So today is something off-topic. I thought I'd talk about two very contentious problems in mathematics, that manage to get PhDs saying that the solution is "obvious" but picking different solutions. If you've not seen them before, I can almost guarantee that you'll get the answer wrong, or get it right through luck and faulty reasoning. The first is known as the Monty Hall Problem. It dates back to 1975 but was popularized by Marilyn vos Savant in 1990 in, of all places, Parade Magazine, a Sunday insert magazine back in the days when journalism was printed on dead trees. The second problem was supposedly one of those infamous interview questions at Google, and was popularized by economist Steven Landsburg on his blog and in his recent book Can You Outsmart an Economist? We'll call it "Are You Smarter Than Google?" since that's what he calls it. It is also apparently very old, but keeps being revived. Let's start with the Google problem since that is a lot newer (at least to me). Are You Smarter Than Google? Here's the problem: There's a certain country where everybody wants to have a son. Therefore each couple keeps having children until they have a boy and then they stop. What fraction of the population is female? Of course, you can't know for sure and so, like all probability problems, it has to be answered in the expectation, if the experiment is repeated over many countries. Steven Landsburg first came across this in a puzzle book when he was a kid, and the answer in the book, which is also the answer apparently Google expected, is incorrect. That answer, which was my reasoning too when I first saw the problem on his blog, was that each birth has a 50 percent chance of being a girl, and nothing that the parents can do can change that. Each child is equally likely to be a boy or a girl. So half of all the children are girls. This answer is actually correct up to the very last sentence. The surprising fact is that although it is true that each individual child is equally likely to be a boy or a girl, it does not follow that (in expectation) half of all children are girls. Two things can be equal in expectation but this does not tell you about their expected ratio. Probabilities and statistics are full of traps for the unwary, such as Simpson's Paradox that I discussed in my Labor Day off-topic post Almost Everyone Has More Than the Average Number of Legs . In that, a player can have a better baseball batting average than another player two years running, but still have a worse average if the two years are taken together. The correct answer is that it depends on the size of the country. As is often the case in math, insight is gained by pushing to very simple examples. Sometimes examples that are what mathematicians call "trivial" are useful, in this case, a country with no population. Unfortunately, there are no children, so we can make trivial statements like "all children are girls" but also "no children are girls". More useful, we can look at a country with one family. So with probability 1/2 they have a boy as their first child, and the ratio of girls to boys is zero (no girls, one boy). With probability 1/4 they have GB and the ratio is 1/2 (one girl and one boy). With probability 1/8 they have GGB and the ratio is 2/3 (two girls and one boy). And so on. Of course, there is always exactly one boy, the question is how many girls there are. Now to add it all up. With probability 1/2 there are 0 girls, 1/4 there is 1 girl, 1/8 there are two girls, and so on. It is a well-known infinite series and it sums to 1 (just add up a few terms at it is already close). So the expected number of boys is one, the same as the expected number of girls. But that is not what we were asked. We were asked for the fraction of girls. To add that up, we add up the fractions. There is a probability of 1/2 that it is 0 (no girls). There is a probability of 1/4 that it is 1/2 (one girl, one boy). There is a probability of 1/8 that it is 2/3 (two girls and a boy). And so on. These add up to 0.306 meaning that the fraction of girls is 30.6% (so not far off 1/3 rather than 1/2). We can do similar calculations for countries with any number of families. If there are 10 families it is 47.51% girls, for example. If the numbers get large, say 5,000 families, the fraction gets close to 1/2 at 49.995% but it never gets there, and even will millions of families it is still just a teeny amount below 50%. Only in the case of a country with an infinite number of families, which doesn't exist, is the 50% answer correct. As Steven Landsburg points out, you can't just say that the tiny difference is irrelevant. If you do the same problem, but instead of asking the fraction of girls, you ask the ratio of boys to girls, then one of the terms that you have to include in the series is the tiny possibility that everyone gets a boy on the first chance, with an infinite ratio of boys to girls. The probability might be low, but a tiny number times infinity is still infinity, so that answer is infinite, which is a long way from 1/2. Advanced question: the solution as given assumes that everyone has finished their family. But more realistic would be to take a snapshot in time, in which case some families haven't had any children yet, and some still have had only girls. Does it make any difference? The answer to this variation, along with lots of other mind-bending puzzles, is in the highly recommended (by me anyway) book Can You Outsmart an Economist? The Monty Hall Problem As originally asked in Parade in the Ask Marilyn column: Suppose you're on a game show, and you're given the choice of three doors: Behind one door is a car; behind the others, goats. You pick a door, say No. 1, and the host, who knows what's behind the doors, opens another door, say No. 3, which has a goat. He then says to you, "Do you want to pick door No. 2?" Is it to your advantage to switch your choice? At first sight, it seems that switching can't change your odds from being 50:50, which means that the answer would be that it makes no difference. But actually, you increase your chances to 2/3 by switching, versus only 1/3 by sticking with the door you already picked. When I said that it seems you can't change your odds, I talked about the wrong odds. When you first picked a door, your chance of getting the car was 1/3 (because there are three doors). Nothing can change that probability. No matter what Monty Hall with doors and goats changes that. Given that, the door that Monty could have opened but didn't has a chance of 2/3 (since there are only two choices and they have to sum to one). To make it a bit more concrete, since the details matters, we need to assume that Monty Hall, the host, always opens one of the doors, and always (since he knows where they are) picks a door with a goat behind it. If you have picked the car, he can open either door. But if not, he has only one choice, the one without a car. I think the easiest way to think about it is that you pick one door. There is a probability of 1/3 you have the car. There is a probability of 2/3 that the car is behind the other two doors. Monty opens a door. There is still a probability of 2/3 that the car is between one of those two doors, you just know an extra piece of information, that the probability is 0 where behind the open door with the goat. The above is NumberWatch and Wikipedia's pictorial representation. For more information, the problem has its own Wikipedia page The Monty Hall Problem . I like to say that there's an XKCD for everything, and of course, there is for this one. Wishing you all the best for the holidays and see you in 2019. Sign up for Sunday Brunch, the weekly Breakfast Bytes email.![]()
↧
↧
Differential pair routing and setting vias correctly
Using Allegro 17.2 Are routing differential lines and need to change layer. Allegro sets vias but they will always be aligned horizontal in respect to each other and thus changing direction when routing horizontal. I guess this is a simpel setting to correct but I cant find where. The image below describes the problem better than words. The orange arrow shows my routing direction when i click to set via. Then the vias are set as seen on the right image (marked wrong). What I would expect to happen is shown in the image to the left (marked "OK"). How do I accomplish this? Breg Vidar![]()
↧
RE: 17.2 Padstack Editor -- Opening scripts for 16.6 in 17.2?
Well, I feel better knowing that. Thanks a lot for the help Steve, truly appreciated as always.![]()
↧
RE: variable sweep in ADEXL
Thank you Andrew! it works fine without sweeping on "mode". If I put a sweep on mode in the Variable field, then it seems that the script won't be able to set the sweep correctly for the whole simulation. Still, it is good to learn something new![]()
↧
Test if figGroup is a clone
Is there a property or function to test is a figGroup is a clone? Paul![]()
↧
↧
RE: variable sweep in ADEXL
You could of course write the code to cope with a sweep value of mode (e.g. mode=1:1:7 if there are 7 modes), work out the range, and combine all the sweep points together. Something like that - although it would be a bit complicated. So it's not impossible. Unfortunately there's no public SKILL function (not sure there's even a private one) to expand the ADE XL sweep points for you, but potentially you could have your code expand a subset of sweep specifications (it's not hard to parse a MATLAB-style sweep definition such as the start:step:stop form). Regards, Andrew.![]()
↧
RE: Test if figGroup is a clone
Hi Paul, lxGetCloneFamilyName will return a name if it's a sync clone, or nil if it's not. Similarly lxGetSyncClone will return the figGroup id if passed a figGroup that's a sync clone, and nil otherwise. However, I think if you pass it a figGroup that is part of a synchronous clone figGroup, it would return that - so the test would need to be if lxGetSyncClone(figGroup)==figGroup Regards, Andrew.![]()
↧
RE: Differential pair routing and setting vias correctly
in routing mode right mouse click and click on via pattern. click vertical![]()
↧
RE: displaying custom text in a schematic info balloon when hovering over an instance
Agreed - and thanks for your assistance. I'll (patiently) wait for the enhancement request to materialize then.![]()
↧
↧
7 Trends We Saw In 2018
I did at 2017 retrospective last year and looking back at 2018 there was a lot that happened that is worth recapping. So here is my 2018 retrospective. 1. The semiconductor industry did well in 2018 According to the Semiconductor Industry Association, sales is expected to touch nearly $478 billion, almost $66 billion or 16 per cent more than in 2017. Data is expected to continue fuelling the growth, and a portent of that is visible in the fact that among all segments of the semiconductor market, dynamic random access memory (DRAM) chips are the fastest-growing market, according to IC Insights. These statistics are positive signs for the global semiconductor market and in fact Cadence CEO Lip-Bu Tan talked about them at his keynote at CDNLive India 2018 in Bangalore. He called it “an ocean of opportunity” – here’s my blog about what else Lip-Bu talked about. The data-driven economy, he had maintained, will be driven by system design enablement, which is a focus area for Cadence. 2. Wave 1: Cloud and data center applications The last 12 to 24 months have witnessed several waves of technology, as we are calling it, that is driving the electronics industry. The first is that cloud and data center applications are booming, and the top names in this space including Amazon and Google are now designing their own chips. Quite a few other big names in tech, including Apple, Facebook and Microsoft are also at it, most of them working on custom chips that have innovation that cannot be provided by general purpose chips. 3. Wave 2: Automotive No surprises here - Automotive is (and has been) going through a transformation over the last few years. ADAS is just the beginning. From infotainment to safety, the whole vehicle is driven on precision electronics. In addition, electric vehicles are also gaining currency in the market. Even as semiconductor content in automobiles has steadily been on the rise, electric vehicles are likely to be far more electronics-driven than gasoline-powered ones. And the trend towards electric vehicles is spreading beyond automobiles to include even motorcycles. Legendary motorcycle company Harley-Davidson is reportedly launching an electric motorcycle next year. Other forms of personal and mass transport could inexorably also go the electric way! 4. Wave 3: Industrial IoT By incorporating artificial intelligence (AI) to manufacturing and industrial processes, we are looking at a revolution—what is being called Industry 4.0. Industry 4.0 encompasses many aspects to manufacturing. Take for example predictive maintenance. According to CIO magazine, predictive maintenance incorporates AI algorithms in the form of machine learning (ML) and neural networks to predict machinery malfunctions and thereby slash unexpected downtime. This is just one example of the far-reaching impact AI and ML can have on current manufacturing processes, making them safer, more efficient and possibly cheaper to run. 5. Wave 4: Mobile and Wireless Mobile and wireless have, of course, driven growth in the last decade to decade-and-a-half, and it doesn’t show any signs of slowing down. Now we are on the cusp of the 5G revolution. The applications that 5G will make possible over the next few years is mind-boggling – from automotive to logistics to healthcare to education and much more. Fortune magazine cites just one fascinating example: say you have stopped at a traffic signal and you see a car jumping the signal on the opposite side of the road, hurtling towards you. With today’s technology, your life could be at risk in this scenario. But with 5G, your car ‘talks’ to the other car and knows the direction, pace and braking ability of the offending car, potentially saving your life. All in miliseconds. 6. Wave 5: Consumer and IoT devices While the consumer wave started some time ago, IoT is the game-changer there, with so many billion connected devices being forecast for the next 5-10 years. 7. AI and ML are the hottest acronyms in technology today...and will be for a while AI and ML are already underpinning modern-day computing and are attracting huge investments. In fact, Lip-Bu predicts that we will see ML-as-a-service in the future! At Cadence, we are already incorporating AI and ML in some of our technologies, such as the Cadence Tensilica HiFi 5 DSP for audio and voice, the first IP core optimized for high-performance far-field processing and artificial intelligence-based speech recognition processing. Another major announcement – this one ties in with the Cloud technology wave - is the Cadence Cloud portfolio, the first broad cloud portfolio for the development of electronic systems and semiconductors. All in all, a good year coming to an end and lots to look forward to in 2019!![]()
↧
DDR5的时代已经到来
本文翻译自Cadence “Breakfast Bytes” 专栏作者 Paul McLellan 文章" DDR5 Is on Our Doorstep "。 space 现在DRAM市场上的谈论热点是DDR5。很多人可能以为JEDEC已经确定了其标准，但实际上它在技术上仍处于开发阶段。我认为最终的DDR5标准有望在年底前出台。 在台积电的OIP生态系统论坛上，Cadence的Marc Greenberg和Micron（美光）的 Ryan Baxter就DDR5的挑战和解决方案发表了演讲。由于工程耗时较长，两家公司决定不再等待DDR5标准的出台而共同制定了一个与他们所预期的最终标准相接近的详细规格。其中，Cadence开发DDR5的接口IP, Micron则开发DDR5 DRAM的原型。此举的另一动机也是以此证明互操作性是证明标准合规性的唯一真实可行的方法。从左上方结果的数据眼图可以看到数据4400Mbps都可以正常工作。 DDR3和DDR4转换的最大驱动力是客户及移动设备，而DDR5的主要驱动因素则是对带宽的需求。由于系统内存带宽跟不上服务器CPU核心数量的增长，服务器因此需要更大的内存带宽。更严格来说，内存带宽在很多年前就已不是由处理器速度的增长所驱动，而是所需要的相应内存带宽的增长驱动。现在，硅片空间被用于为每个芯片添加更多的内核。从密度的角度来看，DRAM的扩展越来越具有挑战性从而导致了不匹配。右侧的图表以图形方式展示了这一点，最底部的浅蓝色线代表每个内核的带宽（基本不变），黄线代表CPU内核的数量，深蓝色线则代表系统内存的带宽。 今年早些时候，Marc向我解释说： 由于物理学的规律，随着内存芯片越来越大，它们变得越来越慢。当在1X 内存技术中构建16Gb 芯片时，距离会变得非常长，使得很多核心时序参数问题变得更加严重。这导致了内存跟不上CPU 发展，于是不得不对其进行过度设计使其变得更大，如此形成了恶性循环。但是为了能拥有更多的数据集、更大的数据库和更大的设计体量，所有人都希望每个服务器里能有更多的内存。内核的速度保持不变，I/O 的速度却越来越快。 （点击查看大图） 上表显示了三个主要市场中DDR5（包括LPDDR5）的预期采用趋势：服务器、PC和消费/工业设备（我认为移动设备归于此类）。第四列进程节点代表的是SoCs与DDR5 IP结合的工艺节点。内存技术有其自身的发展路线和命名惯例。 右侧图表显示了市场的细分状况，随着中间红色代表的DDR5不断增长，顶部棕色代表的LPDDR5也在同期增长，并预计在2022年共同占据市场份额的三分之一。 DDR5不仅仅可以比之前的技术以更快的速度实现，它还具有： 更快的数据速率 更高的指令总线效率 改进的bank group以提高性能 改进的刷新方案 可扩展的超过16Gb的单片密度 每个模块2个独立的40位通道 考虑除速度增加以外的所有因素的话， DDR5 3200的带宽已经比DDR4 3200提高了1.36倍。再加上提速的影响，DDR5 4800比DDR4 3200的带宽就提高了1.87倍，接近2倍。 Ryan表示在明年的晚些时候，市场将推出以亚18nm工艺节点制造的16Gb生产设备。DDR5允许未来扩展，但当DRAM制造达到10-12nm时，由于对芯片的要求大幅增加（可变的滞留时间及其他原子级现象），我们仍需对其扩展的可能性投入大量工作。 Marc进而表示Cadence已经拥有使用7nm和7nm+ IP的设计作为开端，未来将继续开发更先进的技术。尽管目前仍专注于服务器和客户端，消费和工业领域的发展会紧随其后。 DDR5 具有革命性的性能优势。2022 年，人人都将使用它。 space *原创内容，转载请注明出处： https://community.cadence.com space 欢迎订阅“PCB、IC封装：设计与仿真分析”博客专栏， 或扫描二维码关注“CadencePCB和封装设计”微信公众号，更多精彩内容期待您的参与！ space 联系我们：spb_china@cadence.com![]()
↧
dlDlistToIcon result is not usable in a form
I would like to dynamically update an icon in a form label based on values in other fields of the same form. This works when loading the icon from an image, but, does not seem to work when creating the icon from a dl (Display List) object - the goal is to draw a simple mock-up stick figure based on other form fields, so, a "Display List" object as a label icon seems to be the way to go, unless there is a better option? Both dlDlistToIcon and hiLoadIconFile return the expected (handle x y) triplet, but, the one from the Dlist never draws anything - just a black box. If I show the dlist in a blank window then it draws as expected - just not in the label icon. (apologies in advance for asking late afternoon before the holidays, and for not being around to respond again til Jan 2) The code (omitting the form definition) - the crux is at the very end of the code: dl=dlMakeDisplayList() penTable=dlMakePenTable(5) dlSetPenTable(dl penTable) colorIndex=hiMatchColor(nameToColor("red")) dlSetPenColor(1 colorIndex penTable) dlSetPenFillStyle( 1 "SolidFill" penTable) dlAddBox(dl 1 list(0 0) list(200 200) 'bigBox) dlAddBox(dl 4 list(20 20) list(180 180) 'littleBox) icon=dlDlistToIcon(dl 200 200) summaryLayout=hiCreateHorizontalBoxLayout('summaryLayout ?frame "Summary" ?margins list(50 20 50 20) ?spacing 50 ?items list( hiCreateFloatField( ?name 'totalWidth ?prompt "Total Width:" ?editable 'nil ) hiCreateFloatField( ?name 'totalHeight ?prompt "Total Height:" ?editable 'nil ) hiCreateLabel( ?name 'iconLabel ?labelIcon icon ) ) ) sep1=hiCreateSeparatorField(?name 'sep1) sep2=hiCreateSeparatorField(?name 'sep2) arrayGenTopFrame=hiCreateFormLayout('arrayGenTopFrame ?frame "Top Frame" ?items list(coreLayout sep1 ewLayout nsLayout cornerLayout sep2 summaryLayout) ) hiCreateLayoutForm('arrayGenForm "arrayGen Compound Array Generator" arrayGenTopFrame ?callback 'arrayGenFormCB ?minSize 800:10 ) procedure(coreLCVCB() size=getCellSize( arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreL->value arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreC->value arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreV->value ) arrayGenForm->arrayGenTopFrame->coreLayout->coreWidthLayout->coreCellWidth->value=car(size) arrayGenForm->arrayGenTopFrame->coreLayout->coreHeightLayout->coreCellHeight->value=cadr(size) ddsUpdateSyncWithForm() updateIcon() ) procedure(updateIcon() let((lib cell view file w h icon) lib=arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreL->value cell=arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreC->value view=arrayGenForm->arrayGenTopFrame->coreLayout->coreLCVLayout->coreV->value w=arrayGenForm->arrayGenTopFrame->coreLayout->coreWidthLayout->coreTotalWidth->value h=arrayGenForm->arrayGenTopFrame->coreLayout->coreHeightLayout->coreTotalHeight->value ; method 1: this does not work - the image stays blank regardless of cell selection dlClearDisplayList(dl) dlAddBox(dl 1 list(0 0) list(round(w) round(h)) 'extentBox) icon=dlDlistToIcon(dl 200 200) printf("setting icon: %L w=%L h=%L\n" icon w h) arrayGenForm->arrayGenTopFrame->summaryLayout->iconLabel->labelIcon=icon ; method 2: this works - the image is refreshed every time you select a different cell ; whether you use hiLoadIconFile or hiLoadImageFile ; file=ddGetObj(lib cell view hiGetThumbnailFilename())->readPath ; when(file ; icon=hiLoadIconFile(file 200 200) ; printf("setting icon: %L\n" icon) ; arrayGenForm->arrayGenTopFrame->summaryLayout->iconLabel->value=icon ; ) ) )![]()
↧