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RE: Post layout simulation using Ocean Script
Hi Ishant, I assume you have a postlayout netlist ready and you are only looking to add Spectre/APS options like +postlayout to the run. Is that right? Regards, Saloni
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RE: Post layout simulation using Ocean Script
Yes Ma'am, I have postlayout netlist which includes PEX- RC component, now I'm looking for ocean command that allow me to do the postlayout simulation using script.
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RE: Power IR/EM vs Voltus-Fi
Hi Andrey, Voltus-Fi is our new EM/IR solution, while Power IR/EM (or VPS-L) is older. With new products, we put in new functionalities and features, so if you are starting now, please use Voltus-Fi....
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Replace Cache useing TCL command
Hello, I'm using OrCad 17.2 and in the company I'm wokring at there was a change in the database folder (from driver F to G for example) and it effects the option of synchronise using the Part Manager....
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RE: Post layout simulation using Ocean Script
Hi Ishant, If you have an ADE-L state correctly setup to run a postlayout simulation, you can go to Session -> Save Ocean script and save Ocean script ( let's say you give it the name...
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RE: Post layout simulation using Ocean Script
Ma'am, If anyone wants to do the postlayout simulation, then we need to go to Environment and Include Calibre there after that when we run it , it do the post layout simulation. I did it earlier what...
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RE: Is it possible to define interchangeable part numbers in a BOM?
Hi Evan I went back over what you wrote and the only thing that I am not very clear on is where you say "They are form and fit compatible" I can see the case where having multiple vendor P/N's would be...
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RE: Post layout simulation using Ocean Script
Ma'am, Got the solution thanks. Once you have included calibre in the environment and run the simulation for once in GUI it automatically includes RC(PEX) in netlist. We don't need to write any extra...
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Border page lock
Hello, Is there any way to fix a page border in position in Concept HDL 17.2 ? During schematic entry the tool often selects the border (when clicking near it) and drags it all over the place which is...
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"Lick" Licklider, Unsung Hero of US Computer Science
During the war, there was a lot of computer technology developed in all of UK and US (and Germany, although that was mostly electromechanical and so was a sort of dead end). After the war, the US and...
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RE: Getting Started with Verilog-A, Verilog-AMS SImulation in Cadence
Try (at the UNIX window) typing "which xrun" or perhaps "xrun -version". If they work, then you've got XCELIUM. Using "irun" instead will mean you have INCISIVE instead. You can also run "xmroot" or...
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PAM4 Signal using ahdllib or bmslib
I want to generate a PAM4 signal using an ahldlib or bmslib block (I know rand_bit_stream exists in ahdl library and I have used it). Can I generate a PAM4 signal using rand bit stream block and if so,...
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RE: PAM4 Signal using ahdllib or bmslib
No, these don't generate PAM4 signals. Whilst of course you could write a model to do so, it's probably simpler to use the "vsource" component from analogLib, which you can then set the Source Type to...
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Meaning of the "Event Time" in Direct Plot form of Pnoise Jitter
Dear All, I am doing Pnoise-Jitter analysis (for both Rise and Fall edge). In the direct plot form I see Event Time (Please see the attached Snapshot). What it actually means ? Kind Regards,
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RE: Meaning of the "Event Time" in Direct Plot form of Pnoise Jitter
When you set up the jitter analysis, it finds the crossing points of the signal (either rising or falling or both) during the PSS interval itself. If you were to plot the PSS time domain results (not...
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RE: cutClass of vias through skill code
i am using dbCreateVia function, and i am giving parameters like this: viaparams=list(list("cutRows" height) list("cutColumns" 1) list("cutWidth" .064) list("cutHeight"...
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RE: cutClass of vias through skill code
It does tend to help if you actually show what you've tried, as then it would be much simpler to see what you'd done wrong. The cutSpacing needs to be a list of two values - the x and y spacing:...
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RE: cutClass of vias through skill code
Thank you Andrew! i was not giving list(x y). Now it works! As a suggestion to cadence documentation team, they should add an example for each parameter so that people like me who are new to SKILL can...
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Convergence problems using analogLib switch (DC simulation)
Dear all, I am doing a simple testbench for a comparator and would like to have several voltage sources, for different type of analysis, but only one common input on the comparator. So I've defined the...
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