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RE: Term net name changing for the pins automation using SKILL code

Hello Andrew, Many thanks for your advice, I did it so and it works fine. Kind Regards, Odin

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RE: Cross Section Editor Impedance Calculator

Someone wrote a paper on this back in 2006 which might help explain community.cadence.com/.../CDN2006_5F00_Users_5F00_Paper_5F00_Cross_5F00_Section.pdf

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RE: Cross Section Editor Impedance Calculator

Anyone know of an easy way to copy or extract a cross section from one board and read it into a blank board? Other than extracting and weeding through a tech file.

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RE: Cross Section Editor Impedance Calculator

Yes - Inside the cross section editor try Export - Cross Section Technology File, then to import open cross section and use Import - Cross Section Technology File

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RE: Predefined Ports in Virtuoso

Dear Andrew, thanks a lot. Best regards, Matthias

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Write Ocean-XL Script using Skill in IC 6.1.4

Hello, in IC 6.1.7 there is the very useful skill function axlWriteOceanScriptLCV() available. Unfortunately, the project I am currently working on is based on IC 6.1.4 and cannot be upgraded. Is there...

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RE: Parasitic exclusion

Yes, it is clear. Thank you very much Andrew. I had tried this option but I was unsuccessful because, for caps, I only selected one net to deactivate all caps connected to that net. It didn't work. So,...

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RE: Cross Section Editor Impedance Calculator

Since this has nothing to do with the topic of this thread, you should have started a new one.

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A Cadence Carol, Stave II, Part II

This is a continuation of A Cadence Carol... before reading this post, be sure to have read the first three installments! Stave I: Moore’s Ghost, Part I and Part II Stave II: The First of the Three...

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Length match diff pair from pin to via

Hello everyone, Is it possible to length/propagation match traces from pin to via then via to pin? I know you can do the entire trace but there doesn't seem to be a way to do this without net...

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RE: Cross Section Editor Impedance Calculator

Thanks, Steve. Interesting paper, but it just muddied the waters a bit more for me... I asked my PCB manufacturer for the dielectric constant of the soldermask; I do not have those layers there and it...

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RE: ccopt ignore sink - common ui

You might wanna look at "ignore pin" too. By excluding the pins, the tool will not consider the leaf pins for skew balancing and clock drc fixing. Whereas, by using "ignore pin" on them, they would be...

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How to simulate pnoise of fractional (non-integer) frequency divider

Hi there, I tried to simulate pnoise of the frequency divider with a divider ratio of 4.5 (non integer value). however, I have a hard time in setting the beat frequency to be Freq_in/4.5 with relative...

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How to replace the Dummy net

Hi, Is it possible to replace the "Dummy net" with any other net using Skill? i tried "axlDBAssignNet" it shows following message W- Cannot change net on element type: Net "Dummy Net". -karthik.K

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Unable to open the OrCAD panel editor tool

When the panel editor is opened through OrCAD PCB editor(professional) only the tool pallete is available and the panel editor window is not seen. Kindly help to resolve the issue. Regards, Chadga

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RE: Length match diff pair from pin to via

Not without scheduling, you can add a T Point during this process which can be positioned directly onto the via. That way you can pick the T point when you create your Pin Pairs

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Can you please rate my website design?

Hello there! I am currently working on the design of this website: https://vironit.com/ Can you please leave any feedback? Would be good to listen to some opinions.

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RE: Code coverage for sv verification envrionment

Yes, the answer remains the same: if you have a module-based testbench you can use "-coverage all" to enable all types of coverage and it will include the testbench modules. If you want coverage of a...

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RE: calibreview fatal error

Since Calibre is a Mentor (now a Siemens company) product (as it says in the log file), you'd be far better off asking this to Mentor or on a Mentor forum. The product and interface code that generates...

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RE: Set -access +rw for regression

This "attempting to place value" error is coming from the simulator, not from vManager. You will need to find where in your flow you are elaborating the design, and add the switches there. It's...

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