Hi, I followed along hte tutorial in UG995 (2015.2), which results in a block design as in the attached screenshot. Q: Is it possible to pack this entire block diagram into an IP block, so I can re-use it in other designs, to have a hierarchical design aproach in IPI. So the resulting IP block would have the ports : S00_AXI, ACLK, ARESTN, ext_spi_clk, iic_rtl, uart_rtl and spi_rtl. Q: if so, how do I pack this? I tried to pack it as a project and pack it as a directory, but without real success. Is there an example on packing a BD For More Details: Explainer Video Company
↧