Tony, When you say it only works when just 1 finger is used, do you mean just 1 finger in the layout? If so, then have a look at the netlist on the schematic side. Since you said it was a generated pcell, I assume you are using XL and the schem device has fingers=5. If still so, then it sounds like your schematic is not netlisting correctly within Assura. (assuming you are netlisting through Assura) We are seeing something similar, using Assura in a completely different PDK, different process, different fab, and in 6.17. Our netlists on the schematic side don't correctly reflect some of the parameters (such as numberOfFingers or multiplier) as defined in the schem, so we see similar parameter errors. Not blaming Cadence for this, but we haven't figured it out yet. If you can't get past this, 2 possible workarounds, until the real problem is determined, are: 1) try creating a CDL netlist first and reference that in your LVS run, or 2) consider requesting that the parameters of the schematic device be changed such that numberOfFingers is changed from 5 to 1, while either the multiplier is changed from 1 to 5, OR the instance is arrayed . When you (re) generate the layout device you will get 5 individual units rather than one 5-finger unit and will have to overlap the S/D's yourself - no big deal - and you might find better LVS results. Good luck.![]()
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