Hi Cao and Anuradha, Thank you for your suggestions. It seems like I can generate the .lib file successfully using the fictitious model file provided with the tool. However, whenever I am using NCSU 45nm model file, it's failing to show leakage power and function. I am assuming there are some compatibility issues between model files and netlist. Please correct me if I am wrong. I have attached the inverter netlist here ( http://ge.tt/888n5zr2 ) that was extracted using NCSU 45nm PDK and also attached a copy of NCSU model file for NMOS here ( http://ge.tt/3J3w5zr2 ) I have also attached the fictitious model file here ( http://ge.tt/6Wrt5zr2 ) that was provided with the tool. I have looked into the spice deck for both cases and I don't see any transistor or model file definition in the sim.sp (see http://ge.tt/6uw46zr2 ) for NCSU 45nm PDK as I have seen with fictitious model (see http://ge.tt/8gFz5zr2 ). Thank you so much for your time and help. Any suggestion would be very helpful. Thanks Hossain![]()
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