It's not impossible that the routed width on the inner layer would be 5mils for the same impedance and only a coincidence that is also the default width. It's also unlikely that the routed width, for a given impedance, would be the same on an outer layer, typically surrounded by air, and an inner layer, typically surrounded by FR4. If you force the width on the inner layer to be the same as the outer layer, you will likely get a DRC because the impedance of the trace will then be outside of your constraint limits for the impedance rule.
↧