The ansCdlCompParamPrim for netlistProcedure and change the model name to device name were useful for creating netlist from schematic and now the subcircuit is in schematic. Due to checking LVS when the Calibre want to compare layout vs Schematic it compares Netlist source ( the .cdl file which has been created by schematic) vs Layout source from GDSII file (which has been created as .sp file) The current problem is that the .sp file does not include the intended device. The .sp file's text is as follow: * SPICE NETLIST *************************************** .SUBCKT TB_LVS pS_NEG pS_POS pPOS pNEG ** N=4139 EP=4 IP=0 FDC=1 X0 pS_NEG pS_POS pS_NEG crtmom_rf w=1.60761e-07 s=1.59913e-07 nv=289 nh=289 stm=3 spm=5 $X=137250 $Y=-152160 $D=251 .ENDS *************************************** Could you please guide me about the mentioned matter? I will appreciate if you could inform me about how the .sp file is created from GDSII? Is there any tool setting for Layout like CDL export to could recognize the subcircuit to the translator in layout? Sincerely
↧