Is there an automated method (not manual) for controlling the page ordering in a schematic design with a complex hierarchy? Manual editing will only cause problems as pages are added and deleted. For instance a schematic may have individual DRAM channels (A,B...) connected to multiple DIMMs which are located in hierarchical blocks. For each DRAM channel all connection to the hierarchical blocks are contained within a single page of the root schematic. The next page of root contains a different channel with different DIMMs. Currently the annotator appears to process all pages in the root schematic before processing the various hierarchical blocks which then appear in random orders once annotated. As an example, Channel A may be first in the root schematic but the DIMMs that are connected to channel A appear after the DIMMs for channel B once annotated (see below) page 1 Channel A page 2 Channel B page 3 Channel A DIMM 2 page 4 Channel B DIMM 1 page 5 Channel A DIMM 1 page 6 Channel B DIMM 2 It would be optimal for readability if the ordering could be controlled. In this example having the various DIMM pages be in sequential order directly after the page in which they are referenced by the hierarchical block seems to make the most sense (see below). page 1 Channel A page 2 Channel A DIMM 1 page 3 Channel A DIMM 2 page 4 Channel B page 5 Channel B DIMM 1 page 6 Channel B DIMM 2![]()
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