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Hierarchy copy design questions (different view names)
Hi, I'd like to do the hierarchy copy to a self-contained library. How should I do? I'm okay to use SKILL or GUI operation. Thanks! The design has different libraries across the hierarchy which can be...
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RE: Hierarchy copy design questions (different view names)
The simplest would be to use Copy Hierarchy, don't check "Exact Hierarchy", have "Copy All Views" checked, and make sure that the libraries you want to include in the copy are not in the "Skip...
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Importing a Layout Plus (*.max) into an Allegro 17.2 (*.brd) File
Hi, Is it possible to convert/import my OrCAD Layout Plus *.max files over to the Allegro 17.2 *.brd? I do not have SPB 16.3. 16.5 or 16.6 versions installed. I do have a SPB 16.2 version installed if...
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A Cadence Carol: Stave V, The End of It
This is a continuation of A Cadence Carol . Be sure to read the previous installments! Stave I: Moore’s Ghost , Part I and Part II Stave II: The First of the Three Spirits , Part I and Part II Stave...
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RE: Calculator special function Forms
Case 46230572 is what I filed. To be sure, there are some aspects which are nice. The GUI makes it faster to build the form, the forms have a more consistent look and feel, and the preview button is...
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RE: how to define a hot key to remove all probes in a schematic
Hi Andrew, Great! that is exactly what I was looking for! thx. ELiang
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load different display by a hot key
Hi All, There is a default display file from foundry and don't want to modify directly. But would like to use a different display file to load some personal settings. Can we define a short cut key to...
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[HELP] How to automatically place pins over a sub block on IC6.1.6 without...
Hi Cadence Forum I am working on a chip layout and I want to place the pins of the current hierarchy layout so that it will be over the pins of a sub block. Please see image below for clarity. Thank...
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RE: Importing a Layout Plus (*.max) into an Allegro 17.2 (*.brd) File
Hi, You need to get at least hotfix 16 (aka QIR2) installed for 17.2. Then in Setup > User Preferences > Unsupported> set the layout2allegro_unsupported variable. Then restart OrCAD/Allegro...
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Trace snap to pads
I've finished my layout, and have 5 errors left I can't seem to fix. I can't get my traces to snap to the origin of the pads. I've tried several times, but the traces still don't completely finish an...
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RE: Trace snap to pads
Hi, Assuming trace and pad are connected same net, you can try to pick snap to connect point in routing options and to try reconnect those cline. Idf you still can't do it, try to run Tools> Derive...
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RE: Display current view in window title bar
Hi Andrew and Matthew, I had the same issue with IceWM. Andrew's hint (as always) solved it, the registered trademark ® character isn't showing at the end, so it is clearly swallowed. Since it is our...
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how can add flying probe in allegro16.2 pcb
I have board layout in allegro 16.2.I want to add smd flying probe(test point) on through hole via at bottom side of pcb.Please suggest.
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RE: load different display by a hot key
Use drLoadDrf("/path/to/display.drf" nil) The nil as second argument means it won't ask you to save it when you quit virtuoso (can be a bit annoying otherwise). Andrew.
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RE: Display current view in window title bar
Hi Jörg, First avenue would be to check whether the font used contains the character for ®. In KDE there are Settings for the Appearance, which lists the fonts used for the various places. I see from a...
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RE: Orcad Capture - Slow Graphics response on windows 10
Just a follow up on this issue with capture. I have isolated the problem to be related to Windows 10 release V1709 Build 16299.125 (Believe it is called fall creators edition) Running capture V17.2...
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RE: encounter SEGV internal error (with optDesign -postRoute)
i am facing this same problem on place stage. please help me out divya if you know any solution.
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How do I uncheck "Process statement" from sidebar in Simvision?
Hi Cadence, I use latest ncsim and run a large design. I use sidebar to quickly select signals and send to waveform. My VHDL design is so large that there are tens of "unnamed processes" and "process...
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RE: Possible to mix ncsim(64b) with DPI-C/C compiled in 32-bit address space?
I figured I could hack by pointing uint32_t to a uint64_t and it worked.
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