Converting ZPL code to Graphics
Hi, This is a generic question on labels, not specifically about NICELABEL. I have an issue that we need help on, may be you can provide us with a solution. We have a web-platform that connects to...
View ArticleDocumentation error for awvPlotWaveform function in Virtuoso Visualization...
I don't know how to inform Cadence about an error in their documentation, so I just thought I'd mention that there is a typo in the Virtuoso Visualization and Analysis XL SKILL Reference manual...
View ArticleSTEP Question
We want to start using the 3D aspects of PCB Editor. I'm able to output a STEP model of the PCB, but there is no component height associated with the parts. I have watched a few on line videos that...
View ArticleRE: Using Skill for Naming Large Numbers of Pins
Is the cell VXL compliant? Are there pins in the lower cell? Paul
View ArticlePCB Editor Immediately AutoSaving and Closing When Opening Design
I've got an installation of PCB Editor that will open a design, but then will immediately auto-save and close. Immediately after loading the design, it says Auto saving before quitting, please...
View ArticleSchematic editor: how to change the color of the annotations?
Hi! I would like to change the color of the text used for the simulation annotations in the schematic views. For instance, the color of the voltages printed at each node when using...
View ArticleRE: Verilog A to symbol
OK, I tried this - admittedly using IC617, but it should be the same in IC5141 (not sure why you need to use such an old version if this is something new... IC5141 came out in 2004, and the very last...
View ArticleSimulation and PEX
Hi Team Can I please confirm something about simulation and Calibre PEX? I am currently running a transient simulation and a small part of my circuit is using calibre PEX for post layout simulation...
View ArticleMake Reliable Designs That Won’t Fail In The Real World!
Recalls are never fun and are costly. Reliable designs are crucial where they can: • Potentially save the product (or the company) from failing • Preserve the reputation of the company and products •...
View ArticleCadence Specctra (Allegro Router) 17.2 Issues in Windows 7 Pro (64 bit)
Folks, Been having this issue since I installed Cadence SPB 17.2 (now at ISR 37). All products work fine EXCEPT Allegro Router or Specctra as it was originally known. Once opened up, you cannot quit...
View ArticleWhy Silicon Photonics Are a Wave of the Future (or Are They a Particle?)
The movement of information using light is nothing new. Fiber optic communications networks are commonplace in data and telecommunications systems. Advances in IC technology and fabrication are now...
View ArticleRE: Cadence Specctra (Allegro Router) 17.2 Issues in Windows 7 Pro (64 bit)
I have seen this behavior when you run the Allegro Router for the first time during an Allegro session, it will remain running in the background until you close the Allegro session even if you are not...
View ArticleSKILL function for getting point ID (or netlist directory) in ADE XL
I am writing custom SKILL function to process certain file located inside of netlist directory, in IC6.1.7-64b. This file is generated by an internally developed tool of which source code I don't have...
View ArticleRE: Verilog A to symbol
I know the version is so old that its frustrating to use, anyhow the error is still existing, when I initiate the instance in the schematic it doesnt show CDF parameters. But I still went on to get the...
View ArticleRE: Cadence Specctra (Allegro Router) 17.2 Issues in Windows 7 Pro (64 bit)
Hi mcatramb91, Not exactly. I get the same behavior in Windows 7 whether I start Specctra (Allegro Router) within an Allegro layout session or start Specctra by itself...makes NO difference in that I...
View ArticlePower-Aware SI DDR4 Simulation: You Have a Choice!
Simultaneous switching noise (SSN) caused by simultaneous switching outputs (SSO) has been a hot topic for decades in signal integrity (SI) circles (see figure to the right). Some claim only a SPICE...
View ArticleRE: STEP Question
My proceedure (16.6): 1. Duting the footprint creation I add a max height property to the package place bound geometery. If you edit properties on this shape you will see the fieald. This will so the...
View ArticleSpectre skipping points
Hello exports, I guess I might need some parameters to Spectre to avoid skipping value points. By older version it gives good staircased signal (from VerilogA) but in newer version it misses several...
View ArticleRE: PCB Editor Immediately AutoSaving and Closing When Opening Design
Man you're good. I did as you described and my designs seem to open normal again. Then I remembered I had added a skill from 2013, Logomaker, so I thought that may have something to do with it and I...
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