Assuming you're running a simulation with "ams" as the simulator (since spectre doesn't understand SystemVerilog), the ams netlister should create a "cds_globals" module with each of the global variables in, and then you can use an out-of-module reference to access cds_globals.varName from within your SystemVerilog test bench. That's also assuming I've understood your question properly. Regards, Andrew.![]()
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