Thanks, Andrew, To be more specific, I have two cases, one is that I am simulating a multi-phase (16 Phases) VCO at 2.4 GHz with reference frequency 40 MHz in integer mode, and by sequentially selecting one of the phases to be back into PFD, the circuits can synthesize a fractional frequency with frequency offset 40MHz/16. If the phase mismatch between each phase is around 1 ps, which actually introduces spurs at the output, then in order to accurately predict the spur level at the synthesizer's output then what would be the proper max time step for it ? Similarly, if we have a 16 multi-phase output with frequency at 200 MHz with square wave output with phase mismatch around 1 ps, then what would be proper setup for it ? I am sorry that I actually set the max time step but not the time step, without time strobe. Sincerely, Ruixin![]()
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