Hi to everybody, I am using Cadence IC.6.1, and was trying to understand the difference in terms of utility between design variables and parameters (iPar, pPar). I already know that we set the design variables in ADEL, and they are global, so for example if I put the length of all transistors in every subcell in a schematic equal to L, all will have this value. The function iPar() is used to make a CDF depedent on another CDF on the same instance, while pPar() can be used for one cell, and eventually the CDF parameters set with pPar() will appear near the symbol that I instantiate in my top-level schematic. Now, I was trying to understand the advantages of these functions compared to each other: let's suppose we have two cascaded inverters, each corresponding to a symbol that I have in my top level schematic. Both have all transistors with W/L=2, and the second inverter has all transistors with a double size than the first one. Now, this can be done: - with one design variable L, then directly setting in the properties of each transistors the width as a product of L and the respective numbers - with one design variable L, setting the width of each transistor equal to iPar("l") multiplied by the respective numbers - with one design variable L, setting the width of each transistor equal to pPar() in the properties of the cellviews If I want to perform a parametric analysis sweeping L, I don't see any advantage in using iPar() and pPar(), neither if I also want to eventually sweep W. Could you maybe better explain in which situation (or an example) it is advantageous to use them? Thank you, Nicola![]()
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