The latest semi-annual RISC-V workshop took place the week after Thanksgiving. The last one was in Shanghai. The next one is in Barcelona. This one was in...Milpitas. At least it didn't require a plane to get there. It was at what I think of as SanDisk, but has been Western Digital since the 2016 acquisition. In the introduction to the workshop, Rick O'Connor (head-honcho of the RISC-V foundation) said that attendance was 498 people from 138 companies and 35 universities. There were 80 abstracts submitted and they packed the two days to the minute, with 12- and 24-minute slots. People had to introduce themselves, there was no time for Q&A, the next speaker got miked up, the slide clicker was handed off. If you blinked at the wrong moment, not only had the slide changed, but the presenter too. There were 47 sessions (plus 26 posters and demos during the first evening). The biggest case of over-engineering I've seen recently was the badge that was given to the media and speakers. It contained an antmicro board with a SiFive chip that was programmed with NFC to each person's name and company. But doesn't it look cool? The keynote on the first day was by Martin Fink, fairly new in his position as CTO of Western Digital. I'll cover that later. But I'll steal his thunder and say that all of the 1B, soon to be 2B, cores that Western Digital ships will be migrated to RISC-V over the next year or two. The second day keynote was by Linton Salmon of DARPA, who didn't quite say that the government is going to convert everything to RISC-V but say that DARPA is doing what it can to encourage open source IP and associated infrastructure. I'll cover that in a separate post. Dave Patterson—let's call him the father of all things RISC—was there with copies of the new introductory book that he and Andrew Waterman had produced The RISC-V reader . They sold lots of them the first evening for $20 in cold, hard cash. The new edition of the computer architecture bible Hennessey and Patterson's Computer Architecture: A Quantitative Approach (6th Edition) will be available in a couple of weeks from Amazon etc. He had a single copy there, so it is definitely almost real. It is all RISC-V based now. I am not going to attempt to cover 47 presentations in a couple of posts. My aim is not to give you all the technical details of things like the vector instruction extension, but rather to assess to what extent RISC-V is a sea-change in computer instruction set architecture, the processor IP ecosystem, semiconductor in general. In short, is RISC-V going to be another Linux. It's not like Windows or MacOS are going away. But I said in my post Supercomputers that there is a drop-down menu for operating system selection, but it has only one choice: Linux. In his keynote, Martin Fink said that when he had been at HP he had been a big supporter of open source and Linux, and had many arguments about how Linux was a toy and would never be as good as HP-UX, never get used for mission critical projects. Guess what HP (now HPE) runs on its supercomputers? Krste: State of the Union Krste (when you have a rare enough first name you don't need a last name, like my daughter too, but it is Asanović) who is to RISC-V what Dave Patterson was to RISC, gave a summary of where things are in the RISC-V universe. There has been rapid uptake in industry and academia, with numerous proprietary and open-source cores. A lot of work has been done on the shared software ecosystem, but it is still work in progress. Larger companies are adopting it for what are becoming known as minion cores, not the main processor of a smart phone or a server, but the cores that are used for specialized tasks where the code is not exposed to the user. NVIDIA has been public for a year, and all their GPUs now include a RISC-V control processor. As I said above, but actually was announced after Krste spoke, Western Digital are switching all their cores to RISC-V. There are others that Krste knows about that are in progress. CTOs everywhere across the value chain are now aware of RISC-V. It is already replacing second tier ISAs. Andes, Cortus, Codasip (and others not yet announced) are switching. If you are a softcore IP provider, then you should have a RISC-V product in development. Governments are switching. India adopted RISC-V as national ISA. In the US, DARPA mandated RISC-V in a recent security call for proposals. Israel Innovation Authority is creating the GenPro platform around RISC-V. Other countries have things in various stages. If you are a country that wants to control your destiny, you should be looking at RISC-V. There are lots of startups. Many of them are stealthy, but many are choosing RISC-V for new products. However, most won't be visible for another year. One I consider significant is Esperanto, that presented at the workshop, which I will cover later. The commercial ecosystem of products around RISC-V is falling into place, with announcements from Lauterback, Express Logic, Imperas, Micrium, Segger, UItraSOC and more. Demand is driving supply in the commercial ecosystem. RISC-V is becoming the standard ISA in academic research and teaching. Some things were in later presentations such as Celerity with 500-core RISC-V SoC in 16nm FinFET, or FireSim modeling 1,024 quad-core RISC-V servers in the cloud. At the recent 50th MICRO, the 1st Workshop on Computer Architecture Using RISC-V was the largest workshop. It was standing room only with more people, even, than machine learning! At Krste's home-base, UC Berkeley, every level learns RISC-V. He is currently teaching 750 undergraduates. The most popular textbooks are now RISC-V (and the new book was hot off the press and on sale that day for the first time). Summary of 2017: all the major planned technical decisions have been settled, some more work to be done on the ratification process. For 2018? Complete the ratifications. Base vector extensions finalized and ratified. Hypervisor implemented and spec ratified. Formal spec of RISC-V released (suitable for use with formal verification tools like JasperGold). There were presentations on all of these later in the workshop. Cryptographic extensions (RISC-V is already dominating security research). Lots of silicon in the pipeline but still no commercially available Linux-ready SoC for sale . Summary: It is amazing how far and how fast RISC-V has advanced. More is in the pipe. Even more than is public. Still more work to be done. Keynote: Martin Fink Martin Fink was director of HP Labs. Long before the total domination of Linux and open source (for software development tools) he was a big proponent. In fact, 15 years ago, he wrote the book on the subject, The Business and Economics of Linux and Open Source . He started off saying that Western Digital is increasingly a data company, not just a storage company. Data was just a record, back before networks. Once the internet came along, data was about communication and interaction. When did you last use a paper map? Now, data is the new currency, and the currency of the future. Martin characterized data as big data and fast data. Big data is data in the cloud, but a network away. Fast data need immediate access to information and results in real time. Typically, it is in the edge device with relatively limited storage. The computing infrastructure is different too. Big data is centered around the CPU, predetermined ratios of storage and very general purpose. However, there is the overhead of PC logic and it is not optimized for anything in particular. Fast data is things like inference or vision. His analogy was his Audi, which is general purpose transportation. Big data are things like cruise ships, 747 planes, trucks. Fast data are drones, speedboats, private jets. The general purpose approach isn't that great for either in the limit. Martin spent the last five years at HPE building memory-centric computing. The prototype of this had the deceptively bland name "The Machine." If you look at the big trend, we spent the last 10 or 15 years moving everything into the cloud. Now, with things like self-driving cars and IoT, we also need fast data at the edge. That requires modular technologies to optimize space, weight and power. This is where RISC-V has a role. His advice: Don't just go and duplicate what the world has already done today. It's all about the data. Start from the data and work out what is needed to solve the data problems. The processor is a means to an end. Focus on the end. He then made his big announcement, that Western Digital would be migrating all their cores to RISC-V. But they will do more, and they will do it in the open source spirit. They will develop open source IP building blocks for the community, actively partner and invest. He gave an example of Dave Ditzel's company Esperanto, where Western Digital has just made an investment in high-end core development (this set up Dave, since he was the next presentation after the keynote, but you'll have to wait for tomorrow's Breakfast Bytes to read about it). Why is Western Digital doing this? It's not like they are entering the processor business. They have no expectation to ever sell a processor. They are not doing it for cost reasons. It is all about unlocking innovation and unlocking Western Digital's ability to bring innovation to their products in ways they can't envision today. "We need to process the data where it lives," which, of course, is in storage devices of the sort built by Western Digital (and its competitors). Martin wrapped up: We are telling the industry RISC-V is ready. Let's hope our announcement will be a kickstarter. But Wait, There's More... Look for the second post on the RISC-V workshop in tomorrow's Breakfast Bytes. Slides and videos of the entire conference have also just come online here . Sign up for Sunday Brunch, the weekly Breakfast Bytes email.![]()
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